The idea of Autonomous Instruction Memory is to combine Top-Level Instruction Memory and Branch Target Buffer. This kind of architecture has an character of self-generating instruction address.

自主指令記憶體的設(shè)計的想法在於結(jié)合動態(tài)分支預(yù)測器和最上層的指令記憶體而擁有自行產(chǎn)生指令位址的特性，因而使得CPU可以不用傳送指令位址給自主指令記憶體国际免费黄色网站，而達到降低CPU和自主指令記憶體之間指令位址匯流排上傳遞資料量的目的。

The purpose of such concept is to reduce instruction address traffic between CPU and instruction memory to a minimum.

這個概的目的是要將CPU與指記憶體之間的指位址傳輸?shù)阶畹汀?/p>

It has a microcontroller peripheral devices are connected to high-speed bus connections within the connection interface and memory card connection interface, the micro-controller memory card interface, high speed bus interface to connect external devices and virtual within the integrated drive electronics interface module, and the virtual integrated drive electronics interface module includes an integrated drive electronics interface to the virtual host and virtual device side, and when the host side of the card reader connected to the memory card storage or read the instructions issued, the command will be sent to Xuni integrated Shi-driven electronic interface module, and in which the instruction to complete, while the memory card of the information on the transmission to achieve high speed Waiwei components provided within the connecting bus transfer rate, and the host will think that reader is integrated drive electronics interface devices, not just within the high-speed peripheral devices connected bus devices.

其具有微控制器分別連接有高速外圍元件內(nèi)連接總線連接接口及存儲卡連接接口，而微控制器具有存儲卡接口人碰逼免费视频、高速外圍元件內(nèi)連接總線接口及虛擬整合式驅(qū)動電子接口模塊，且虛擬整合式驅(qū)動電子接口模塊包括有整合式驅(qū)動電子接口的虛擬主控端及虛擬裝置端18se视频在线观看，而當主機端對讀卡機所連接的存儲卡下達儲存或讀取的指令時www肏屄屄屄c0m，該指令會傳送至虛擬整合式驅(qū)動電子接口模塊，并在其中將指令完成人人插插AV，而存儲卡內(nèi)的資料于傳輸時可達到高速外圍元件內(nèi)連接總線所提供的傳輸速率6080电影网站午夜伦，且主控端會認為讀卡機為整合式驅(qū)動電子接口裝置，而非單純的高速外圍元件內(nèi)連接總線裝置激情中文小说区图片区。

instruction decode：指令譯碼

[文摘]:該課題所設(shè)計的微處理器共包括兩部分:整數(shù)單元和浮點單元.整數(shù)單元采用五級流水線結(jié)構(gòu)分別為指令提取(Instruction Fetch)級、指令譯碼(Instruction Decode)級欧美性爱久精品、指令執(zhí)行(Execution)級人人干,人人操。、存儲器訪問(Memory access)級、寫回(Write Back)級.論文詳細闡述了流水線設(shè)計過程,

explicit matrix representation：顯式矩陣表示

顯性語言知識教學(xué):explicit instruction | 顯式矩陣表示:explicit matrix representation | 內(nèi)隱記憶能力:Explicit memory capability

microcode memory：微碼內(nèi)存

微碼指令集 microcode instruction set | 微碼內(nèi)存 microcode memory | 微碼程序檢查 microcode program check,MCPC